Deep Learning HW Engineer
(Home Based Office/Hybrid/Katowice)

Job Description:

The IPG IP Engineering Group located in Katowice, Poland is looking for energetic and passionate IP Logic Design Engineers / Deep Learning HW Engineer to work in the following areas:

• Ultra Low Power, state of the art Neural Network Accelerators (code name GNA)
• And/or soft IP cores for Intel's next generation chips/and SOCs for the different market segments
  

Job role involves evaluation, development and design of deep learning hardware structures and interfaces that accelerate Deep Learning (DL) software. Impacts and influences the Artificial Intelligence (AI) product roadmap and development based on profound comprehension of AI and DL algorithms, DL customer requirements and DL software frameworks. Provides a comprehensive view of solutions and supporting pre and post-Silicon activities in multiple domains. Collaborates with Workload and Algorithm teams to analyze next generation requirements and opportunities, influences and guide research and academic collaboration in the space of AI and DL.

Qualifications:

Candidate should have a Master's and/or a PhD's degree in Electronics, Electrical engineering or Computer Science engineering with 5-9 years of ASIC design/validation industry experience in front end processes including:

• Expertise in design, development and integration of IP blocks for system-on-chip (SoC) components
• Expertise in Verilog and System Verilog
• Experience in synthesis flow and timing closure
• Experience in multi clock domain designs
• Experience in SVA
• functional and power/performance optimisation / and verification (Experience in considerations for power, performance and cost optimization is desirable)
• Experience in reading and writing technical documentation (high-level spec and micro-architecture spec) is desirable.
  

Candidate should have the ability to work effectively with both internal and external teams and stakeholders, have strong problem-solving and good communication skills.
Excellent written and verbal communication skills in English and Polish language.
As an advantage:

• Experience with Synopsys tools
• Experience in one/more of the AMBA standards (OCP, AXI, AHB, etc..)
• Experience in serial interface protocols (USB, SPI)
• Experience in Formal Verification
• Experience in multi power domain designs
• Familiarity with DL/ML Neural Networks technology
  

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Materials important for you - to learn more about Intel.
Learn more about Intel in Poland: https://intel.ly/3eq8QlY
Rewards Experience @ Intel Poland: https://intel.ly/3ftPwog

Please be informed that Intel is proactively trying to find candidates for this position which is frequently available at Intel Technology Poland. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant.

Apply now