пропозиції роботи
Justyna Michalska
Lead Design Engineer, Cadence Design Systems
Katowice,
śląskie
Dołącz do GoldenLine i obejrzyj pełny profil tej użytkowniczki
Zobacz pełny profil
Umiejętności
SystemVerilog
Verilog
Podstawy programowania - C
Podstawy programowania Python
Języki
angielski
dobry
Doświadczenie zawodowe
Lead design engineer
* IPs Verilog HDL developer
* Initial verification of IPs with SystemVerilog and C languages
* High quality code verification by company tools and action plan - Synthesis, Lint and CDC performance
* Technical documentation preparation
* Analyzing and estimating potential issues during development
* Working in multinational team environment
* Technical support
* Initial verification of IPs with SystemVerilog and C languages
* High quality code verification by company tools and action plan - Synthesis, Lint and CDC performance
* Technical documentation preparation
* Analyzing and estimating potential issues during development
* Working in multinational team environment
* Technical support
Design Engineer/Pre-sales support
* Pre-sales and technical support
* High quality code verification - Synthesis and Lint performance
* Working in multinational team environment
* High quality code verification - Synthesis and Lint performance
* Working in multinational team environment
Edukacja
Elektronika i Telekomunikacja, magisterskie
Politechnika Śląska
Specjalizacje
Inżynieria
Elektronika/Elektryka
Zainteresowania
HTML, CSS
